Monday 26 March 2012

8-bit instructions

Most 8-bit operations could alone be performed on the 8-bit accumulator (the A register). For dyadic 8-bit operations, i.e. 8-bit operations with two operands, the added operand could be either an actual value, addition 8-bit register, or a anamnesis corpuscle addressed by the 16-bit annals brace HL. Direct artful was accurate amid any two 8-bit registers and amid any 8-bit annals and an HL-addressed anamnesis cell. Due to the approved encoding of the MOV-instruction (using a division of accessible opcode space) there were bombastic codes to archetype a annals into itself (MOV B,B, for instance), which was of little use, except for delays. However, what would accept been a archetype from the HL-addressed corpuscle into itself (i.e., MOV M,M) was instead acclimated to encode the HLT apprenticeship (halting beheading until an alien displace or interrupt).

16-bit operations

Although the 8080 was about an 8-bit processor, it aswell had bound abilities to accomplish 16-bit operations: Any of the three 16-bit annals pairs (BC, DE, HL) or SP could be loaded with an actual 16-bit amount (using LXI), incremented or decremented (using INX and DCX), or added to HL (using DAD). The XCHG1 operation exchanged the ethics of HL and DE. By abacus HL to itself, it was accessible to accomplish the aforementioned aftereffect as a 16-bit arithmetical larboard about-face with one instruction. The alone 16-bit instructions that affect any banderole are DAD H/D/B, which sets the CY (carry) banderole in adjustment to acquiesce for programmed 24-bit or 32-bit arithmetics (or larger), bare to apparatus amphibian point arithmetics, for instance.

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